A 7th Framework Programme Collaborative Project funded by the European Union
High Capacity Optical Networks
Optical metro and core networks, in this post-bubble period, have evolved from point-to-point high-capacity links to dynamically re-configurable networks driven by the traffic generated from new bandwidth-hungry applications. This is also confirmed by the successful deployment of mesh-capable Reconfigurable Add-Drop Multiplexers (ROADMs). Next generation optical networks will be capable of dynamically allocating bandwidth, setting-up and tearing-down lightpaths and providing more advanced real-time resources allocation, evolving from static network topologies to re-configurable networks that change and adapt according to bandwidth requirements.
In the core networks, the focus of attention and research is on the next upgrade step necessary to cope with increasing volume of traffic. As an evolution of the core network capacity, special attention is given towards three directions in the physical layer concerning advanced modulation formats (DPSK, DQPSK), transmission bit-rate (targeting deployment of 100 Gb/s) and optical signal regeneration.
New advanced modulation formats - either binary or multilevel - have received significant attention due to superior transmission performance, spectral efficiency and practical realisation. Moreover, multi-level coding schemes can increase the data transmission capacity, whilst relaxing the driver requirements of high-speed optical, optoelectronic and electrical components.
The bit-rate upgrade path of core/metro networks is the main focus of current system vendors, internet service providers and corresponding working groups. The main discussion amongst optical GbE is whether 40 Gb/s will be the stepping stone for migrating from 10 Gb/s to 100 Gb/s, or whether this transition should be made in a single jump for achieving tenfold bit-rate increase.
Signal regeneration and more specifically optical regeneration has been the focus of research, due to the potential for data transparency and more cost-effective mitigation of transmission impairments without the requirement of complete optical-electrical-optical (OEO) systems. Re-amplify and Re-shape (2R) as well as Re-time, Re-amplify and Re-shape (3R) optical regenerators are promising candidates for 40 Gb/s and 100 Gb/s systems, where the use of electronic repeaters becomes challenging, costly and significantly increases power consumption.
The APACHE project was conceived by taking into account the above evolution of optical networks and the successful deployment of tuneable and reconfigurable components and systems. APACHE, for the first time, will extend this re-configurability in terms of rate and modulation formats to the transmitter and receiver side by developing multi-format devices and will develop the integration methodology as well as the required underlying photonic technology with an ultimate aim to develop and commercialize agile, terabit-capacity, re-configurable photonic devices compatible with next generation dynamic networks.
APACHE Integration Concept
In order to meet the challenges of significant cost reduction, coupled with increased system-level performance of photonic components, a new strategy for integration is proposed in APACHE, analogous to the approach used in the electronic industry of board stuffing. In that case, components are passively assembled into a printed circuit board according to their function. These components may be discrete devices such as resistors or monolithic chips such as integrated circuits.
Within APACHE, using CIP’s silica-on-silicon hybrid integration technology, the major stumbling block for the photonic equivalent is overcome, through the passive assembly process providing precision alignment for single mode optical devices, where micron or sub-micron alignment tolerances are required. Using this approach, a planar silica waveguide device acts as the optical printed circuit board (or motherboard) providing the passive waveguide interconnection fabric. Precision cleaved, mode expanded monolithic components are passively assembled on a silicon submount (daughterboard) which is in turn passively assembled into the planar silica motherboard. The approach requires a unified design method for the hybrid device which, as well as defining the alignment features necessary for assembly, defines the mode sizes of the optical components at the interfaces between active and passive elements. Moreover, compared to InP, passive silica-based waveguides show lower absorption losses, lower group velocity dispersion, better matching to optical fibres and less temperature sensitivity. Within APACHE, the motherboard and daughterboards (planar lightwave circuit board – PLCB) will be further exploited and developed for hosting larger monolithic chips, such as arrays of InP modulators, DFB lasers, SOAs and EAMs.
The basic characteristic of the APACHE devices is the agility made possible through the capability to generate, modulate and regenerate optical signals for various modulation formats using one multi-functional device. The functionality required is offered through monolithic “add-ons” (e.g. InP based modulators lasers, amplifiers etc.) passively assembled on the silicon submounts and subsequently on the PLC motherboard. Within APACHE, significant research efforts will be devoted for fabricating active optical chips on InP for modulation, regeneration and reception of high-speed (>100 Gb/s) signals.